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HC15 Hardware Interface Description
5.5 Pin Assignment and Signal Description
s
HC15_HD_v01.000 Page 43 of 67 2007-1-19
Confidential / Released
The following table describes the signal pins available over the application interface via the board-to-board inter-
face.
Table 16: Signal description
Function Signal name IO Signal form and level Comment
Power supply BATT+ I V
I
max = 4.2V
V
I
norm = 3.8V
V
I
min = 3.2V during Tx burst (GSM) on
board
I
2A, during Tx burst (GSM)
n Tx = n x 577µs peak current every
4.616ms
Pins of BATT+ and GND
must be connected in par-
allel for supply purposes
because higher peak cur-
rents may occur.
Minimum voltage must not
fall below 3.2V including
drop, ripple, spikes.
Overvoltage shutdown
takes effect if BATT+ =
4.3V ± 2%.
Power supply GND Ground Application Ground
External sup-
ply voltage
VEXT O V
O
typ = 2.6V ± 3%
I
O
max = 50mA
VEXT may be used for
application circuits.
If unused keep pin open.
Not available in Power-
down mode. The external
digital logic must not cause
any spikes or glitches on
voltage VEXT.
Power indica-
tor
PWR_IND O V
IH
max = 10V
V
OL
max = 0.4V at Imax = 2mA
PWR_IND (Power Indica-
tor) notifies the module’s
on/off state.
PWR_IND is an open col-
lector that needs to be con-
nected to an external pull-
up resistor. Low state of
the open collector indi-
cates that the module is
on. Vice versa, high level
notifies the power-down
mode.
Therefore, the pin may be
used to enable external
voltage regulators which
supply an external logic for
communication with the
module, e.g. level convert-
ers.
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