
Semiconductor Group 9-1
OTP Memory Operation
C501
9 OTP Memory Operation of the C501-1E
The C501-1E is the OTP version of the C501-1R ROM version microcontroller. Its functionality is
fully compatible with the C501-1R functionality. This chapter describes in detail the programming
features of the C501-1E.
9.1 Programming Modes
The C501-1E is programmed by usng a modified Quick-Pulse Programming
TM 1)
algorithm. It differs
from older methods in the value used for V
PP
(programming supply voltage) and in the width and
number of the ALE/PROG
pulses. The C501-1E contains two signature bytes that can be read and
used by a programming system to identify the device. The signature bytes identify the manufacturer
and the type of the device.
Table 9-11 shows the logic levels for reading the signature byte, and for programming the program
memory, the encryption table, and the security bits.
Notes :
1. “0” = valid low for that pin, “1” = valid high for that pin.
2. V
PP
= 12.75 V ± 0.25V
3. V
CC
= 5 V ± 10% during programming and verification.
4. ALE/PROG
receives 25 programming pulses while V
PP
is held at 12.75 V. Each programming pulse is low for
100 µs (±
10 µs) and high for a minimum of 10 µs.
1
Quick-Pulse Programming
TM
is a trademark phrase of Intel Corporation
Table 9-11
OTP Programming Modes
Mode RESET PSEN
ALE/
PROG
EA/V
PP
P2.7 P2.6 P3.7 P3.6
Read signature 1 0 1 1 0000
Program code data 1 0 0 V
PP
1011
Verify code data 1 0 1 1 0011
Progam encryption table 1 0 0 V
PP
1010
Program security bit 1 1 0 0 V
PP
1111
Program security bit 2 1 0 0 V
PP
1100
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