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OTP Memory Operation

C501

Semiconductor Group 9-2

9.2 Quick-Pulse Programming

The setup for microcontroller quick-pulse programming is shown in figure 9-28. Note that the

C501-1E is running with a 4 to 6 MHz oscillator The reason the oscillator needs to be running is that

the device is executing internal address and program data transfers.

Figure 9-28

C501-1E OTP Memory Programming Configuration

The address of the OTP memory location to be programmed is applied to port 1 and 2. The code

byte to be programmed into that location is applied to port 0. RESET, PSEN

and pins of port 2 and

3 specified in table 9-11 are held at the “Program code data“ levels. The ALE/PROG

signal is

pulsed low 25 times as shown in figure 9-29.

Figure 9-29

C501-1E ALE/PROG

Waveform

MCS03232

Port 1

RESET

P3.6

P3.7

XTAL2

XTAL1

Port 0

EA/

ALE/PROG

PSEN

P2.7

P2.6

P2.0 - P2.4

Programming

Data

+12.75 V

25 x 100 s

A8 - A12

A0 - A7

4 - 6 MHz

C501-1E

+5 V

Low Pulses

MCT03234

ALE/PROG

10 s min.

25 Pulses

ALE/PROG

µµµ

1 2 ... 90 91 92 93 94 95 96 97 98 99 100 ... 120 121

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