
Semiconductor Group 5 - 2
On-Chip Peripheral Components
P1 and p3 are not active during Hardware Power Down.
P1 is activated only for two oscillator periods if a 0-to-1 transition is programmed to the port pin (not
possible during HWPD).
P3 is turned off during reset state (also HWPD).
For detailled description of the port structure please refer to the SAB 80C517/80C537 User’s
Manual.
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