
Semiconductor Group 6 - 1
6 Interrupt System
6.1 Additional Interrupt for Compare Registers CM0 to CM7
There is an additional interrupt which is vectored to on a compare match in one of the eight
comparators of the compare registers CM0 to CM7, when compare mode 1 is selected for the
corresponding channel (assigned to Timer 2 by control bit CMSEL.x). For that purpose the
SAB 80C517A provides eight interrupt request flags (in SFR IRCON1, address 0D1H) which are
ORed to form the interrupt request for that vector, i.e. each of the eight comparators has its own
request flag. Thus the service routine may decide which compare match requested the interrupt.
The corresponding request flag is set by every match in the compare channel when the Compare
Mode 1 is selected for this channel (assigned to Timer 2). If Compare Mode 0 is selected for a
channel (assigned to the Compare Timer), the corresponding interrupt request flag will not be set
on a compare match.
This interrupt is enabled by setting the enable bit ECMP in SFR IEN2. If this bit is set the program
vectors to location 0A3
H
if one of the eight request flags in IRCON 1 is set.
Figure 6-1 shows a functional block diagram of the new structure concerning the interrupts. The
further functions of this compare unit keep full compatibility to the SAB 80C517.
Interrupt System
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