
Device Specification
Semiconductor Group 7-16
Functional Description
The SAB 80C517A is based on 8051 architecture. It is a fully compatible member of the
Siemens SAB 8051/80C51 microcontroller family being an significantly enhanced
SAB 80C517. The SAB 80C517A is therefore compatible with code written for the
SAB 80C517.
Having an 8-bit CPU with extensive facilities for bit-handling and binary BCD arithmetics the
SAB 80C517A is optimized for control applications. With a 18 MHz crystal, 58 % of the
instructions are executed in 666.67 ns.
Being designed to close the performance gap to the 16-bit microcontroller world, the
SAB 80C517A’s CPU is supported by a powerful 32-/16-bit arithmetic unit and a more flexible
addressing of external memory by eight 16-bit datapointers.
Memory Organisation
According to the SAB 8051 architecture, the SAB 80C517A has separate address spaces for
program and data memory. Figure 2 illustrates the mapping of address spaces.
Figure 2
Memory Map
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