
Semiconductor Group 2 - 1
2 Fundamental Structure
The SAB
80C517A/83C517A-5 is a high-end member of the Siemens SAB 8051 family of
microcontrollers. It is designed in Siemens ACMOS technology and based on the SAB 8051
architecture. ACMOS is a technology which combines high-speed and density characteristics with
low-power consumption or dissipation.
While maintaining all the SAB 80C517 features and operating characteristics the SAB 80C517A is
expanded in its "fail-safe" characteristics
and timer capabilities.
Furthermore, the SAB 80C517A additionally contains 2 kByte of on-chip RAM (called XRAM), a
10bit A/D converter with 12 multiplexed inputs, enhanced Baud Rate Generators and the
capabilities of the Compare Capture Unit are improved.
The
SAB 80C517A is identical with the SAB 83C517A-5 except that it lacks the on-chip program
memory.
The SAB 80C517A / 83C517A-5 is supplied in a 84-pin plastic leaded chip carrier package
(P-LCC-84) and in a 100-pin plastic metric rectangular flat package (P-MRFP-100).
The essential enhancements to the SAB 80C517 are:
– Additional 2KByte RAM on chip.
– 32 kByte on-chip program memory (SAB 83C517A-5 only)
– 12-channel 10-bit A/D Converter
– Additional Compare Mode for Concurrent Compare function at Port 5; up to eight pins on P5
can be either set or reset on a compare match in two additional compare registers.
– Dedicated interrupt vector for the 16-bit compare registers CM0-CM7: Interrupt requested on
a compare match in one of the eight compare channels (eight request flags are available)
– New baud rate generator for Serial Channel 0
– Expanded baud rate range for Serial Channel 1
– Hardware controlled Power Down Mode
– Improved functionality of the Oscillator Watchdog
– High speed operation of the device (up to 18 MHz crystal frequency)
Figure 2-1 shows a block diagram of the SAB 80C517A
Fundamental Structure
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