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8-16

Ladder Logic (LAD) for S7-300 and S7-400

C79000-G7076-C504-02

8.15 On-Delay Timer Coil

The On-Delay Timer Coil (SD) instruction starts a specified timer if the RLO

has a positive edge (that is, a transition from 0 to 1 takes place in the RLO).

A signal state check of the timer for 1 produces a result of 1 when the

specified time has elapsed without error and the RLO is still 1. When the

RLO changes from 1 to 0 while the timer is running, the timer is stopped. In

this case, a signal state check for 1 always produces the result 0. For

information on the location of a timer in memory and the components of a

timer, see Section 9.1.

Table 8-14 On-Delay Timer Coil Element and Parameters, with SIMATIC and International Short Name

LAD Element Parameter Data Type Memory Area Description

Timer

number

TIMER T The address indicates the number of

the timer that is to be started.

Time value

Time value S5TIME I, Q, M, D, L Time value (S5TIME format)

Status Word Bits

BR CC 1 CC 0 OV OS OR STA RLO FC

Write – – – – – 0 – – 0

I 0.0 T 5

If the signal state of input I 0.0 changes from

0 to 1 (that is, there is a positive edge in the

RLO), timer T 5 is started. If the time elapses

and the signal state of input I 0.0 is still 1,

output Q 4.0 is 1. If the signal state of input

I 0.0 changes from1 to 0, the timer is stopped,

and output Q 4.0 is 0.

T 5 Q 4.0

S5T# 2s

Figure 8-14 On-Delay Timer Coil

Description

Bit Logic Instructions

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