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10-2

Ladder Logic (LAD) for S7-300 and S7-400

C79000-G7076-C504-02

10.1 Location of a Counter in Memory and Components of a Counter

Counters have an area reserved for them in the memory of your CPU. This

memory area reserves one 16-bit word for each counter address. The ladder

logic instruction set supports 256 counters.

The counter instructions are the only functions that have access to the

counter memory area.

Bits 0 through 9 of the counter word contain the count value in binary code.

The count value is moved to the counter word when a counter is set. The

range of the count value is 0 to 999. You can vary the count value within this

range by using the Up-Down Counter, Up Counter, and Down Counter

instructions.

You provide a counter with a preset value by entering a number from 0 to

999, for example 127, in the following format:

C#127

The C# stands for binary coded decimal format (BCD format: each set of

four bits contains the binary code for one decimal value).

Bits 0 through 11 of the counter contain the count value in binary coded

decimal format . Figure 10-1 shows the contents of the counter after you have

loaded the count value 127, and the contents of the counter cell after the

counter has been set.

Irrelevant

127

14 13 12 11 10 9 8

76 54 32 10

111110000000

15 14 13 12 11 10 9 8

76 54 32 10

1110111100

irrelevant Binary count value

Count value in BCD (0 to 999)

Figure 10-1 Contents of the Counter Cell after the Counter has been set with Count

Value 127

Area in Memory

Count Value

Bit Configuration

in the Counter

Counter Instructions

1 2 ... 133 134 135 136 137 138 139 140 141 142 143 ... 317 318

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Siemens NAN 67 Series Wartungshandbuch Seite 138