Siemens ET 7Y Series Spezifikationen PDF herunterladen (Seite 55)

Addressing

3-7

ET 200S IM 151-7 CPU Interface Module

A5E00058783-04

3.4 Accessing the intermediate memory in the IM 151-7 CPU

Access in the user program

The following table tells you how to access the intermediate memory in the

IM 151-7 CPU from the user program.

Table 3-2 Accessing the address areas

Access dependent on data

consistency

The following applies

1-, 2- or 4-byte data consistency

with load/transfer instructions

All areas parameterized with “unity” consistency can be accessed.

You can address a maximum of 64 bytes of input data using load

instructions and a maximum of 64 bytes of output data using transfer

instructions (L PIB/PIW/PID; T PQB/PQW/PQD; see also Instruction

list).

The data consistency for word addressing is 2 bytes; for double-word

addressing it is 4 bytes.

Access is also possible via the process image.

1- to 32-byte data consistency on

the PROFIBUS-DP with SFC 14

and SFC 15

If the address area of consistent data is in the process image, this

area is updated automatically.

If you want to access data in the intermediate memory, you have to

read the input data with SFC 14 ”DPRD_DAT” and write the output

data with SFC 15 ”DPWR_DAT”. These SFCs have data consistency

of 1 to 32 bytes.

You can only copy the input data read with SFC 14 as a block of 1 to

32 bytes to a memory marker address area, for example, where it

can be addressed with A M x.y. You can also write only one block of

1 to 32 bytes as output data with SFC 15 (see also the System and

Standard Functions) Reference Manual.

If you access areas with “whole length” consistency, the length in the

SFC must correspond to the length of the parameterized area.

It is also possible to address the consistent areas directly (for

example, L PIW or T PQW).

1 2 ... 50 51 52 53 54 55 56 57 58 59 60 ... 213 214

Keine Kommentare

Siemens ET 7Y Series Spezifikationen Seite 55