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Installing 575 System Hardware SIMATIC 545/555/575 System Manual
4.15 Using Boards in the VMEbus Base
Refer to the SIMATIC 545/555/575 Programming Reference User Manual
for details concerning communication support between 575 CPUs and
third-party masters using VMEbus READ/WRITE instructions. Refer to the
SIMATIC 575 Interboard Communication Specification (PPX:575–8103–x)
for details on message support between 575 CPUs and third-party masters.
Table 4-5 summarizes the VMEbus specifications for the 575 CPUs.
Table 4-5 SIMATIC 575 CPU VMEbus Specifications
Function Comments
System Requirements
SYSRESET*
1
ACFAIL* must be asserted at least 2 milliseconds before
SYSRESET* is asserted.
ACFAIL*
1
ACFAIL* must be asserted at least 2 milliseconds before
SYSRESET* is asserted.
+5V STDBY Must be powered with +5 V during normal operation and a
minimum of +3 V during power off.
Services Provided by the System Controller
Arbiter Prioritized (PRI)
SYSRESET*
1
Driven during fault recovery, if configured (See Section 4.11)
VMEbus Timer 40 microseconds
IACK* Daisy chain driver Provided
SYSCLK 16 MHz
Local Bus Timer (Limit to get on the
VMEbus)
255 microseconds
Master
Requester
2
Release-When-Done (RWD) and Request-on-No-Request (similar
to FAIR requester). The 575 requests on Level 3.
Interrupter
3,
4
Release on acknowledged (ROAK). D08(O)
Address space supported A24:D16, D08(EO) A16:D16, D08(EO)
Address modifiers supported 29
16
– Short non-privileged access
5
2D
16
– Short supervisory access
39
16
– Standard non-privileged data access
5
3A
16
– Standard non-privileged program access
3D
16
– Standard supervisory data access
3E
16
– Standard supervisory program access
Slave
Address space supported A24:D16, D08(EO) – Shared RAM
3
A16:D08(EO) – Global Communication Status
Registers (GCSR)
3
Access Time Shared RAM – 300 nanoseconds (no contention)
GCSR – 4 microseconds
1) During fault recovery ACFAIL* is not driven.
2) All third-party masters must be Release-When-Done (RWD).
3) Refer to the SIMATIC 575 Interboard Communication Specification.
4) Interrupt processing by user programs is not supported at this time.
5) Supported by RLL MOVE instruction.
Communicating
with the CPU
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